PDL Abstract

Thermometer: Profile-Guided BTB Replacement for Data Center Applications

ISCA ’22, June 18–22, 2022, New York, NY, USA.

Shixin Song2, Tanvir Ahmed Khan2, Sara Mahdizadeh Shahri2, Akshitha Sriraman1, Niranjan K Soundararajan3, Sreenivas Subramoney3, Daniel A. Jiménez4, Heiner Litz5, Baris Kasikci2

1 Carnegie Mellon University
2 University of Michigan
3 Intel Corporation
4 Texas A&M University
5 University of California, Santa Cruz


Modern processors employ a decoupled frontend with Fetch Directed Instruction Prefetching (FDIP) to avoid frontend stalls in data center applications. However, the large branch footprint of data center applications precipitates frequent Branch Target Buffer (BTB) misses that prohibit FDIP from eliminating more than 40% of all frontend stalls. We find that the state-of-the-art BTB optimization techniques (e.g., BTB prefetching and replacement mechanisms) cannot eliminate these misses due to their inadequate understanding of branch reuse behavior in data center applications.

In this paper, we first perform a comprehensive characterization of the branch behavior of data center applications, and determine that identifying optimal BTB replacement decisions requires considering both transient and holistic (i.e., across the entire execution) branch behavior. We then present Thermometer, a novel BTB replacement technique that realizes the holistic branch behavior via a profile-guided analysis. Based on the collected profile, Thermometer generates useful BTB replacement hints that the underlying hardware can leverage. We evaluate Thermometer using 13 widelyused data center applications and demonstrate that it provides an average speedup of 8.7% (0.4%-64.9%) while outperforming the state-of-the-art BTB replacement techniques by 5.6× (on average, the best performing prior work achieves 1.5% speedup). We also demonstrate that Thermometer achieves a performance speedup that is, on average, 83.6% of the speedup achieved by the optimal BTB replacement policy.