An Analysis of Database System Performance on Chip Multiprocessors
Proceedings of the 6th Hellenic Data Management Symposium (HDMS2007), Athens, Greece, July 2007.
Nikos Hardavellas, Ippokratis Pandis, Ryan Johnson, Naju G. Mancheril, Stavros Harizopoulos*, Anastasia Ailamaki and Babak Falsafi
Carnegie Mellon University
Prior research shows that database system performance is
dominated by off-chip data stalls, resulting in a concerted effort to
bring data into on-chip caches. At the same time, high levels of
integration have enabled the advent of chip multiprocessors and
increasingly large (and slow) on-chip caches. These two trends
pose the imminent technical and research challenge of adapting
high-performance data management software to a shifting
In this paper we characterize the performance of a commercial
database server running on emerging chip multiprocessor
technologies. We find that the major bottleneck of current software is data cache stalls, with L2 hit stalls rising from oblivion to become the dominant execution time component in some cases. We analyze the source of this shift and derive a list of features for future database designs to attain maximum performance. Towards this direction, we propose the adoption of staged database system designs to achieve high performance on chip multiprocessors. We present the basic principles of staged databases and an initial implementation of such a system, called Cordoba.
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