Contact: Greg Ganger

MEMS-based storage is an exciting new technology that could provide significant performance gains over current disk drive technology and at costs much lower than EEPROM technology. Based on MEMS (MicroElectroMechanical Systems), this non-volatile storage technology merges magnetic recording material and thousands of recording heads to provide storage capacity of 1-10 GB of data in under 1 cm^2 area with access times of under a millisecond and streaming bandwidths of over 50 Mbytes per second. Further, because MEMS-based storage is built using photolithographic IC processes similar to standard CMOS, MEMS-based storage has per-byte costs significantly lower than DRAM and access times an order of magnitude faster than conventional disks.

Another interesting aspect of MEMS-based storage is its ability to incorporate both storage and processing into the same chip. Because MEMS-storage is CMOS-based, it is possible to integrate several microprocessors or hundreds of custom computational engines (e.g., MPEG encode/decode, cryptography) directly with the storage device. This integration will significantly improve performance, power consumption, and cost. More importantly, it will lay the foundation for a single computing brick that contains processing and both nonvolatile and volatile storage. Developing these concepts is the central focus of a research center at CMU called CHIPS.

Although MEMS-based storage devices may still be several years away from commercialization, their potential impact in reducing the memory gap makes them an important technology for systems designers' consideration. Therefore, we have begun the exploration process, seeking an understanding of how MEMS-based storage can improve application performance and how different MEMS device characteristics can fundamentally change the behavior and design of storage systems. Our early results indicate that MEMS-based storage can significantly reduce application I/O stall times for a set of five file system and database workloads. The resulting speedups for these applications are around 5X, depending mainly on the ratio of computation to I/O. Ongoing work refines the device models, explores how they should change system architectures and memory hierarchies, and investigates newly-enabled applications.

To ensure that our models of MEMS-based storage accurately reflect potential implementations, we work closely with a group of researchers who are actively building MEMS-based storage devices. This collaboration allows us to explore the system-level impact of various types of MEMS-based storage, evaluating which physical design trade-offs (e.g., acceleration speed, velocity, size, capacity) are most important across a range of applications. In turn, our results feed back to the MEMS researchers, focusing their attention on design parameters that significantly impact system-level performance and avoiding optimizations that provide little real benefit.



Greg Ganger


John Griffin
Steve Schlosser




We thank the members and companies of the PDL Consortium: Actifio, American Power Conversion, Avago Technologies, EMC Corporation, Facebook, Google, Hewlett-Packard Labs, Hitachi, Huawei Technologies Co., Intel Corporation, Microsoft Research, NetApp, Inc., Oracle Corporation, Samsung Information Systems America, Seagate Technology, Symantec Corporation, and Western Digital for their interest, insights, feedback, and support.




© 2015. Last updated 10 August, 2012