RE: [Fwd: I-D ACTION:draft-cavanna-iscsi-crc-vs-cksum-01.txt]

[Douglas Otis <dotis@sanlight.net>]

Matt,

Adler-32 was designed to handle any byte length which is not something
required for iSCSI if padding is included in the digest.  Modification to
allow two bytes at a time should not be a problem as you would reduce the
number of accesses in half. (One quarter the accesses required for CRC-32!)
If a 16-bit add is used, then a subtraction with a carry tests for a modulo
wrap will occur for each location.  This is not a substantial difference and
will still be faster than normal Adler-32 as you have cut the number of
iterations in half.  It should be likely Adler-16:32 vs. Adler-8:32 is more
robust if burst error detection is required.  I doubt Fletcher-32 is as
robust as Adler-xx as DMA or FIFO memory errors are likely to induce the
same modulo used in Fletcher.

Doug


> -------- Original Message --------
> From: Internet-Drafts@ietf.org
> Subject: I-D ACTION:draft-cavanna-iscsi-crc-vs-cksum-01.txt
> To: IETF-Announce: ;
>
> A New Internet-Draft is available from the on-line Internet-Drafts
> directories.
>
>
> 	Title		: iSCSI Digests û CRC or Checksum?
> 	Author(s)	: V. Cavanna, M. Wakeley
> 	Filename	: draft-cavanna-iscsi-crc-vs-cksum-01.txt
> 	Pages		: 12
> 	Date		: 07-Mar-01
>
> The iSCSI working group is currently considering the method of
> protecting iSCSI messages from errors. This I-D presents a proposal
> to use the Fletcher-32 checksum algorithm or some variant of it
> rather than Adler-32; if we must use CRC, to make it CRC32 (or
> CRC32Q) rather than CRC64.
>
> A URL for this Internet-Draft is:
> http://www.ietf.org/internet-drafts/draft-cavanna-iscsi-crc-vs-cks
um-01.txt

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