DATE: Thursday, May 4, 2006
TIME: 12:00 pm - 1:00 pm

Phillip Gibbons, Intel Research Pittsburgh
Michael Kozuch,
Intel Research Pittsburgh

Log-Based Architectures

Programs misbehave too often, as a result of bugs and attacks. Runtime monitoring tools ("lifeguards") are helpful but too slow, often slowing down the monitored program by an order of magnitude or more. The emergence of chip multiprocessors (CMPs) as a dominant computing platform means that most programs will be multi-threaded, leading to even more bugs. Fortunately, CMPs also provide an opportunity to use otherwise idle cores to assist in monitoring tasks. In the Log-Based Architectures (LBA) project, we are designing an architected on-chip logging mechanism for dramatically reducing the overheads induced by runtime program monitoring. This mechanism enables inspecting a program's dynamic behavior on another core, using the program history to understand what's gone wrong, and rewinding the program in order to intervene. Our early results show that with proper hardware support, lifeguards can run with much lower slowdown (2-3X or less), an order of magnitude improvement. Our goal is to continue to reduce this overhead, so that lifeguards can run with only negligible slowdown of the monitored program. Moreover, LBA enables new lifeguards types (e.g., temporal invariant checkers) and new performance optimizations (e.g., unsafe compiler optimizations).

(The speakers will also identify potential projects of interest to architecture, compiler, and systems students.)

Phillip Gibbons and Michael Kozuch are Principal Research Scientists at Intel Research Pittsburgh. Gibbons received a Ph.D. in Computer Science from the University of California at Berkeley in 1989. He joined Intel Research in 2001 after 11 years at (AT&T and Lucent) Bell Laboratories. He has published over 50 papers in highly-selective conferences and journals, served on the program committees for over 25 international conferences, and holds 16 patents. Gibbons is currently on the Editorial Board for the Journal of the ACM and Conference Chair for the ACM Symposium on Parallelism in Algorithms and Architectures. His research interests include parallel computing, databases, and sensor networks. Kozuch received a Ph.D. in Electrical Engineering from Princeton University in 1997. He joined Intel in 1997 and has been located at the Intel Research Pittsburgh lab since 2001. His research focuses on novel uses of virtual machine technology. In recent years, Kozuch contributed significantly to Intel's virtualization, security, and simulation technologies. Currently, he leads the Internet Suspend/Resume project and co-leads (with Phil Gibbons) the Log-Based Architectures project. Kozuch has authored or co-authored over 15 scientific papers and 20 patent applications.

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