DATE: Thursday, April 26, 2001
TIME: Noon - 1 pm
PLACE: Hammerschlag Hall D210

Ted Wong

Carnegie Mellon University

My Cache or Yours?

Modern high-end disk arrays typically have several gigabytes of cache RAM. Unfortunately, the array cache is often inclusive: interactions between client and array cache management policies cause the array cache to duplicate some of the contents of the client cache. As a result, the aggregate cache behaves as if it was only as big as the larger of the client and array caches, instead of as large as the sum of the two.

Our preliminary research explores the potential benefits of making the array cache exclusive. We implement modified client and array cache management policies to ensure that data blocks are placed at either the client or the array, but not both. Exclusivity thus creates a single, large unified cache. We present the results of a simulation study that show up to 7.5x speedups by switching from inclusive to exclusive caches for a set of synthetic and real-life workloads.

This research was conducted with Greg Ganger (Dept. of ECE, CMU) and John Wilkes (Hewlett-Packard Laboratories), with the support of the Storage Systems Program at HPL and the members of the Parallel Data Consortium.

Ted is a 4th year Ph.D. student in the Computer Science Department at Carnegie Mellon University. He completed a BA in Engineering Science from Oxford University in 1993, and an M.Eng in Computer Science from Cornell University in 1995. He has been part of several research projects since coming to CMU, but has settled down to work on dynamic recovery for survivable storage systems.

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