DATE: Thursday, November 9, 2000
TIME: Noon - 1 pm
PLACE: Wean Hall 8220

Tajana Simunic

Departments of Computer Science and Electrical Engineering, Stanford University

Energy Efficient System Design

Energy consumption of electronic devices has become a serious concern in recent years. Energy-efficient design of systems demands optimization in design and utilization of both hardware and software. In this work we first discuss power management algorithms that enable optimal utilization of hardware at run time. In addition, we develop a modular approach for accurate and fast simulation of hardware and software energy consumption at the system level. Finally, we present an energy consumption profiler that is used to optimize software.

Power management (PM) algorithms aims at reducing energy consumption at the system-level by selectively placing components into low-power states. Our approaches are event-driven and give optimal results verified by measurements. The first approach we present is based on renewal theory. This model assumes that the decision to transition to low power state can be made in only one state. Another method we developed is based on the Time-Indexed Semi-Markov Decision Process model (TISMDP). This model assumes that a decision to transition into a lower-power state can be made upon each event occurrence from any number of states. This model allows for transitions into low power states from any state, but it is also more complex than our other approach. It is important to note that the results obtained by renewal model are guaranteed to match results obtained by TISMDP model, as both approaches give globally optimal solutions. We implemented our power management algorithms on two different classes of devices: two different hard disks and client-server WLAN systems such as the SmartBadge or a laptop. The measurement results show power savings ranging from a factor of 1.7 up to 5.0 with performance basically unaffected.

We next present a modular approach for enhancing instruction level simulators with cycle-accurate simulation of energy dissipation in systems. Our methodology has tightly coupled component models thus making our approach more accurate. Performance and energy computed by our simulator are within 5% tolerance of hardware measurements on the SmartBadge. We show how the simulation methodology can be used for hardware design exploration aimed at enhancing the SmartBadge with real-time MPEG video feature. In addition, we present a profiler that relates energy consumption to the source code. Using the profiler we can quickly and easily redesign the MP3 audio decoder software to run in real time on the SmartBadge with low energy consumption. Performance increase of 92% and energy consumption decrease of 77% over the original executable specification have been achieved.

For Further Seminar Info: