SDI Seminar

Speaker: Mihai Budiu,Carnegie Mellon University

Date: December 3, 1998
Time: Noon
Place: Wean Hall 8220

Fast Compilation for Reconfigurable Hardware

Reconfigurable hardware can deliver very high performance for a class of applications, which include media processing. However, the state-of-the-art tools treat reconfigurable device programming like hardware design: they are slow, complex, and compile specialized hardware description languages. Our effort is to make this process more similar to software development. We want to compile C or Java, quickly. The talk will present our optimizing compiler, having as source Dil, (Data-flow Intermediate Language), a language very similar to C. Our target architecture is PipeRench, the virtualized hardware pipelined chip developed together with the ECE department. We achieve very fast compilation times (seconds) and impressive speed-ups for a wide range of kernels. The core of the compiler is a linear-time place-and-route algorithm, which will be presented in some detail.